The circuit diagram AI that doesn't guess where the wires go

The problem with asking AI to read a circuit diagram

Integrated circuits are everywhere: signal processing, power management, you name it. Engineers use symbolic analysis to predict how a circuit will behave before they build it. The first step is turning a schematic image into something a computer can work with: a transfer function or some other symbolic expression. That means the system has to recognize the components and their connections from the image, then do algebra correctly. Up until now, that was a manual job, and mistakes were common. The challenge is that VLMs are good pattern matchers but terrible at multi-step reasoning, as seen in work like the human-hours paradox in AI coding agents.

Multimodal large language models have opened up new possibilities for circuit tasks, but most of the work so far has focused on recovering netlists or optimizing parameters, not generating symbolic expressions from schematics. One system called CircuitSense did try this using chain-of-thought prompting, but it had no way to check its intermediate work. Errors piled up, and accuracy on complex circuits was poor.

AutoVSR: a structured architecture with verification feedback

AutoVSR, described in a recent preprint and submitted to ICML, takes a different approach. It breaks the problem into two stages. First, instead of asking a model to reason directly from pixels to algebra, it reconstructs the schematic into an executable intermediate representation. For component-level circuits, that means a SPICE-like netlist; for system-level block diagrams, it is a JSON-structured signal flow graph. This is not just a description in words, it is a machine-readable object that a symbolic solver can run and analyze. The architecture resembles the separation of planning and execution that frameworks like Qoder bring to code generation.

To make sure the intermediate representation is correct, AutoVSR uses a verification feedback loop. A task router picks the right type of IR, then a vision module finds the components and pulls in only the relevant syntax rules, no extra clutter. A four-stage validation pipeline follows: static syntax parsing, input/output specification checks, dynamic structural solvability (checking for floating nodes or shorted sources), and symbolic quantity evaluation (trying to derive the target expression). If the system finds errors, up to three rounds of correction are allowed, sending structured feedback back to the VLM to regenerate the IR. This two-stage check keeps local misrecognitions from turning into global reasoning failures.

Decoupling planning from execution

The second stage uses a plan-and-execute symbolic reasoning agent. Instead of making the VLM do multi-step algebra, which LLMs are not great at, the system hands equation construction and computation over to 28 deterministic symbolic APIs built on Lcapy and SymPy, with Mason's Gain Formula for signal flow. The LLM breaks the analysis objective into atomic steps, then drives an action-observation loop where each tool call returns structured, verifiable intermediate results. A hard limit of 20 steps prevents infinite loops. This verification-first approach echoes the philosophy behind M3's evolutionary math verification.

This decoupling is crucial, the authors write in the paper. By relying on deterministic solvers, AutoVSR mitigates error accumulation and produces rule-consistent reasoning with transparent intermediate results.

Benchmark and results: beating both VLMs and specialized methods

The researchers tested AutoVSR on a filtered benchmark of 5,020 samples from CircuitSense, covering five circuit types: pure resistive networks (Type 1, 1,146 samples), RLC circuits (Type 2, 2,671), small-signal models (Type 3, 464), module-level circuits (Type 4, 511), and system-level block diagrams (Type 5, 228). The task was to generate correct transfer function expressions, verified by SymPy and a numerical fallback. The results mirror findings from Sonnet 4.6's cost-efficiency gains: smaller, smarter architectures can beat larger black-box models.

Against seven end-to-end VLMs, including Gemini-3-Flash, GPT-5-mini, Claude-Haiku-4.5, Qwen3-VL-Plus, Llama-4-17B-128E, and GLM-4.6V-Flash, AutoVSR improved accuracy by 30 to 59 percentage points overall. On Type 1 and Type 2 simple circuits, the gains were particularly sharp: 66% and 64% on average across models. On Type 5 system-level signal flow with nested feedback loops, accuracy jumped from 11.8% to 41.7%, a gain of nearly 30 percentage points.

Compared to CircuitSense, the only other specialized method out there, AutoVSR improved transfer function generation accuracy by 42 to 52 percentage points across models. On the harder task of transient response expression, time-domain reasoning, AutoVSR raised accuracy from 3.1% to 85.8% with Gemini-3-Flash, and from 1% to 63.3% with GLM-4.6V-Flash. That is an absolute gain of 83 and 62 percentage points, respectively.

Ablation and efficiency: every module counts

Ablation studies confirmed that every component matters: the task router, component detection, rule library, verification flow, planning module, and tools library. Remove any single module and performance drops. The most critical piece was the tools library: without it, accuracy on Gemini-3-Flash fell from 82.9% to 20.5%. This mirrors a broader lesson seen in best practices for AI coding agents: robust toolchains matter more than model size.

Practical efficiency tests on 100 representative cases showed that AutoVSR with a lightweight backend like Gemini-3-Flash hit 89.3% accuracy using only 4,563 tokens and 17 seconds of runtime. That beats frontier models like GPT-5 (45.6% accuracy, 7,152 tokens, 148 seconds) and Claude-Sonnet-4.5 (26.2% accuracy, 7,033 tokens, 89.5 seconds).

Implications for AI-assisted engineering

AutoVSR shows a way past black-box reasoning for technical domains that need correctness and interpretability. By forcing a verifiable intermediate step and offloading symbolic computation to deterministic tools, the framework turns a fallible VLM into a reliable reasoning agent, even with small, open-source backbones. The approach is task-agnostic in its first stage: the executable IR gives a structural representation that a solver can reuse for different analytical goals. This verification-first strategy is gaining traction across engineering domains, as seen in the production gap in vibe coding.

The paper acknowledges some limits. The current framework works with static circuit topologies only, it cannot handle dynamic changes or nonlinear elements. Future work may extend to mixed-signal circuits and more complex feedback networks. Still, for the narrow but critical job of turning circuit diagrams into symbolic expressions, AutoVSR is a solid step toward practical, AI-assisted design.